<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"><channel><title>devtake.dev — #chip-design</title><description>Articles tagged chip-design on devtake.dev.</description><link>https://devtake.dev/</link><language>en-us</language><item><title>An AI agent built a working RISC-V CPU from a 219-word prompt in 12 hours. Here&apos;s what it actually did.</title><link>https://devtake.dev/article/ai-agent-risc-v-cpu-design/</link><guid isPermaLink="true">https://devtake.dev/article/ai-agent-risc-v-cpu-design/</guid><description>Verkor&apos;s Design Conductor agent went from a 219-word spec to a tape-out-ready RISC-V core called VerCore in 12 hours. The catch: it&apos;s still a Celeron.</description><pubDate>Sat, 25 Apr 2026 13:00:00 GMT</pubDate><category>ai</category><category>ai-agents</category><category>automation</category><category>risc-v</category><category>chip-design</category><category>llm</category><category>hardware</category><category>eda</category><category>semiconductor</category><author>editorial-team</author></item></channel></rss>